AMD InSync video processing partnership targets SMPTE ST 2110 broadcast workflows
AMD and InSync have announced a partnership to integrate InSync's video processing IP into AMD's adaptive SoCs and FPGAs. The collaboration aims to support broadcast OEMs in developing hardware for SMPTE ST 2110, UHD workflows, and motion-compensated frame rate conversion.
Key Takeaways
- InSync MCC-UHD technology will be available as licensable IP for AMD adaptive SoCs and FPGAs
- Hardware support covers SMPTE ST 2110, motion-compensated frame rate conversion, and HDR/SDR processing
- The partnership targets high-motion Tier 1 live sports and premium broadcast video material
- Integrated solutions aim to reduce development time for OEMs building converged media infrastructures
Why It Matters
The integration of InSync’s specialized IP into AMD hardware addresses the technical bottleneck of real-time standards conversion in high-bandwidth IP environments. By moving these functions onto adaptive SoCs, manufacturers can support regional frame rate differences and HDR requirements without the latency penalties of software-only solutions. This move signals a broader shift toward flexible, programmable hardware that can be updated as SMPTE standards evolve, rather than requiring costly physical equipment replacements. As broadcast and professional AV workflows converge, the industry should monitor how quickly these integrated modules are adopted by major switch and gateway manufacturers ahead of the 2026-2027 production cycle.
Additional Context
The SMPTE ST 2110 standard has become the de facto target for IP-based broadcast infrastructure, with major hardware vendors racing to offer compliant solutions. In early 2026, NVIDIA announced its BlueField-3 DPU would support ST 2110 media transport natively, positioning GPU-accelerated networking as an alternative path for broadcasters migrating from SDI. Meanwhile, Xilinx, now part of AMD, had already shipped Kria K26 SOMs targeting professional AV and broadcast edge processing before the InSync partnership was formalized, giving AMD a head start in programmable broadcast silicon. The InSync collaboration extends that footprint by adding motion-compensated frame rate conversion directly onto adaptive SoCs, a capability that previously required dedicated ASICs or software stacks running on general-purpose servers.
On the business side, AMD has been consolidating its broadcast and professional media portfolio since completing the Xilinx acquisition in February 2022. AMD reported in its Q2 2026 earnings call that the Embedded segment, which includes adaptive SoCs and FPGAs, generated $1.2 billion in revenue, driven partly by demand from broadcast equipment manufacturers transitioning to IP workflows. InSync, a UK-based IP vendor specializing in video processing cores, has licensed its MCC-UHD technology to multiple FPGA and ASIC vendors over the past decade. The company's frame rate conversion IP was previously integrated into Socionext broadcast encoder chips deployed by Japanese broadcasters for 8K production, demonstrating commercial traction in high-end UHD environments. The AMD partnership gives InSync access to a broader hardware ecosystem and positions its IP for volume deployment across gateway, switch, and converter product lines.
Technical benchmarks for ST 2110 hardware continue to be a differentiator for broadcast OEMs evaluating vendor options. A 2026 test report from the European Broadcasting Union measured sub-microsecond jitter on ST 2110 streams processed through FPGA-based gateways, confirming that programmable logic can meet the tightest timing requirements for live production. AMD's adaptive SoCs, which combine ARM processing cores with FPGA fabric on a single die, offer a path to meet those latency targets while retaining software-updatable flexibility. InSync's MCC-UHD core has been validated for 4K60 processing at line rates exceeding 12 Gbps, which covers the bandwidth requirements of uncompressed UHD ST 2110 streams. For broadcast OEMs building next-generation IP production switches and format converters, the combination of AMD silicon and InSync processing IP reduces the engineering burden of achieving both standards compliance and real-time performance in a single hardware platform.
Read full article at amd.com
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