Nexperia has launched new 1200V silicon carbide (SiC) MOSFETs in QDPAK packaging, designed to improve thermal performance in high-power applications through a top-side cooled design. This innovation aims to increase power density and efficiency, supporting applications such as data center power systems and EV charging infrastructure. The devices are available with various on-resistance options and in industrial-grade and automotive-qualified versions.
Nexperia is addressing the critical thermal bottleneck in high-density power conversion where traditional bottom-side cooling through the PCB limits performance. By offering a 3kW potential increase in power handling, these MOSFETs enable more compact and efficient power systems essential for AI data centers and 800V EV architectures. This launch intensifies the technical race among top-tier SiC players like Wolfspeed and Infineon, who are prioritizing advanced packaging to maximize wide-bandgap efficiency. Watch for adoption rates in automotive onboard chargers and industrial motor drives to signal a broader industry shift toward top-side cooling as a standard for high-voltage power management.
Nexperia's QDPAK launch extends a broader industry push toward top-side cooled packaging for wide-bandgap power devices. Automotive World reported that QDPAK routes heat from the top side of the package directly to the heatsink rather than through the PCB, allowing the two thermal domains to be managed separately and adding around 40°C of thermal headroom at equivalent power levels compared with conventional D2PAK-7 packaging. The portfolio covers both industrial-grade and automotive-qualified variants with RDS(on) values ranging from 17 to 80 mΩ, giving design teams a scalable platform across EV onboard chargers, high-voltage DC-DC converters, and data center power systems.
On the business side, Nexperia is positioning QDPAK as a complement to its existing X.PAK platform rather than a replacement. Power Electronics News noted that QDPAK builds on the X.PAK platform and extends power handling by approximately 3 kW at comparable case temperatures, while offering around 23°C additional thermal headroom at similar power levels. This layered packaging strategy lets Nexperia address both cost-sensitive designs that can tolerate bottom-side cooling and thermally constrained applications that require direct die-to-heatsink paths.
From a technical standpoint, the QDPAK devices include a Kelvin source pin that enables faster commutation and improved switching control. Electronics Weekly highlighted that this pin helps designers manage ringing, EMI, and switching transients, a detail that matters for engineers working on high-frequency power conversion topologies where parasitic inductance can degrade efficiency. The combination of low-inductance package design and controlled switching behavior positions these MOSFETs for applications where both thermal performance and electromagnetic compatibility are critical constraints.
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