Dartmouth researchers develop PRO pixel sensor technology to adapt readout modes

This development addresses the fundamental engineering compromises inherent in modern CMOS design, where sensors are typically locked into specific performance profiles at the factory. By enabling a programmable readout, cameras could theoretically transition from high-frame-rate capture to ultra-low-noise imaging within the same sequence without swapping hardware. For the streaming ecosystem, this flexibility could eventually lower production costs by reducing the need for specialized high-speed or low-light camera bodies on set. The industry should monitor future iterations of this architecture to see if researchers can improve the 33% fill factor and reduce pixel size to meet modern cinema standards.

Dartmouth College's PRO pixel sensor enters a landscape where adaptive imaging is becoming a priority for both academic labs and commercial sensor makers. In early 2026, Sony Semiconductor Solutions demonstrated a stacked CMOS architecture that dynamically adjusts conversion gain on a per-frame basis at CES, targeting broadcast and cinema cameras that must handle rapidly shifting lighting without operator intervention. The approach shares the PRO sensor's core premise of trading off noise against dynamic range in real time, though Sony's implementation operates at the column level rather than within individual pixels. Meanwhile, Canon announced in March 2026 that its next-generation Cinema EOS bodies would incorporate dual-base-ISO readout paths selectable at the sensor level, a commercial step toward the kind of multi-mode flexibility that Dartmouth's prototype demonstrates at the research stage.

The business case for programmable sensors is being driven by production economics. A 2025 report from Omdia projected that global demand for cinema-grade CMOS sensors would grow 14% year over year through 2028, fueled by streaming original content budgets that require faster turnaround with fewer specialized camera bodies. Studios and rental houses have responded by consolidating around versatile platforms like the ARRI Alexa 35 and Sony Venice 2, which offer multiple readout modes but still rely on fixed dual-gain circuits rather than fully programmable paths. If PRO-style architectures mature beyond the 180 nm prototype node, they could reduce the number of distinct camera bodies a production needs to carry, directly addressing the cost pressures identified in that market forecast.

On the technical side, Dartmouth's 33% fill factor remains the primary hurdle for production viability. Researchers at imec published results in late 2025 showing a 65 nm stacked pixel achieving 78% fill factor while maintaining switchable readout modes, suggesting that advanced process nodes could resolve the area penalty inherent in adding programmable circuitry to each pixel. The imec design used through-silicon vias to route control signals beneath the photodiode, a technique that Dartmouth's team has not yet adopted but which could be critical for scaling PRO pixels below the 3-micron pitch required for 4K and 8K cinema sensors. Independent benchmarking of the Dartmouth prototype showed a 12-bit dynamic range in high-DR mode and read noise below 2 electrons in low-noise mode, figures that are competitive with current fixed-mode designs at the same process node.