D-Matrix launches Corsair AI chip claiming 10x speed over GPUs
D-Matrix has unveiled its new 'Corsair' AI chip, claiming a 10x speed advantage over GPUs for AI inference by integrating SRAM directly onto the chip. Production of the 6nm chip by TSMC has begun, with shipments slated to start this month, addressing the AI memory bottleneck. The company recently secured $275 million in Series C funding, valuing it at $2 billion.
Key Takeaways
- Corsair chip integrates 128GB of SRAM and 256GB of LPDDR5X capacity per card to eliminate external memory latency.
- Manufactured on TSMC's 6nm process, the platform achieves 315 PFLOPS of performance and 40 PB/s memory bandwidth.
- Volume shipments begin in June 2026 to hyperscalers and frontier AI labs for low-latency 'agentic' AI applications.
- The company secured $275 million in Series C funding led by Temasek and Microsoft's M12, valuing D-Matrix at $2 billion.
Why It Matters
The launch marks a transition from GPU-only data centers to heterogeneous architectures optimized for the 'inference era.' As generative video and real-time AI agents demand lower latency, the memory-centric approach of D-Matrix addresses the structural shortage and high cost of High Bandwidth Memory (HBM). By decoupling performance from HBM supply chains, D-Matrix provides a viable alternative for companies scaling interactive AI services without being throttled by component scarcity. The high-profile backing from Microsoft suggest the tech is being evaluated as a vital co-processor for future LLM deployments. Watch for initial benchmarks from Neocloud providers this summer to see if the 10x speed claim holds under production-scale video generation workloads.
Additional Context
The rollout of the Corsair chip coincides with a critical 'memory wall' in AI infrastructure. Per TrendForce (January 2026), HBM consumption is expected to grow by more than 70% in 2026, driven by the adoption of next-generation platforms like Nvidia's Vera Rubin. This demand has triggered a 'memory tax' where prices for DDR5 and HBM have surged, with some suppliers reportedly sold out through 2026. Morgan Stanley (June 2026) noted that AI demand has turned once-commodity memory components into rationed assets, forcing data centers to seek architectural workarounds like the on-chip SRAM strategy employed by D-Matrix. Competition in the inference-specific silicon market is intensifying as incumbents pivot. In December 2025, Nvidia completed a $20 billion asset acquisition of Groq to secure its Language Processing Unit (LPU) technology, which similarly uses SRAM for faster token generation. At GTC 2026, Nvidia unveiled the Groq 3 LPU, scheduled for Q3 2026 release, which serves as a dedicated decode-phase co-processor. This shift suggests that even dominant players recognize that traditional GPUs are no longer the most efficient tools for real-time interactive AI. Strategic consolidation is also occurring among rivals. Per Reuters (June 2026), AMD recently acquired the engineering team from Untether AI to bolster its own inference capabilities, while Meta has accelerated its MTIA custom silicon roadmap. D-Matrix’s entry into volume production positions it as one of the few independent startups delivering merchant silicon to a market desperate for diversified supply. Tech analysts at Barchart (June 2026) indicate that as hyperscaler capex is projected to reach $650 billion this year, the focus is shifting away from training power and toward the unit economics of at-scale inference.
Read full article at startuphub.ai
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