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Leads a team responsible for the design and verification of neuromorphic chiplets and IP, from microarchitecture through post-silicon validation. Works with architects, AI researchers, and physical design engineers to turn emerging accelerator concepts into manufacturable silicon. Requires principal-level silicon leadership, a track record of processor or accelerator architectures, SoC integration experience with high-speed interfaces, and RTL and ASIC flow expertise.
HQ Belgium·Hybrid