Senior Lithography and Photomask Process Engineer

About the role

This senior semiconductor role leads photomask and reticle operations, EUV pellicle development, and yield ramp failure analysis across EUV and DUV lithography. The engineer coordinates with scanner, design, thin-film, and etch teams, mentors junior staff, and works with equipment suppliers. Requires 8+ years of fab process experience and a graduate degree in a related discipline.