SoC Design Verification Engineer

About the role

This contract role centers on pre-silicon verification of system-on-chip designs, including emulation content execution and coverage-driven regressions. Candidates need SystemVerilog and UVM skills, low-power (UPF) methods, and exposure to debug fabric, power management, memory, and PCIe/CXL verification. A bachelor's or master's in electrical, electronics, or communication engineering with 2+ years of experience is expected.